Date: Thu, November 29, 13:00-
Place: Room As301, As Block, IIS, The University of Tokyo

Invited Speaker: Prof. Sudeshna Sinha (The Institute of Mathematical Sciences)

Title: Stochastic Resonance based Logic Gates

Abstract:
We introduce a scheme to obtain key logic-gate structures using the
phenomena of stochastic resonance. The idea is to exploit the effect
of noise on nonlinear systems in order to extract different desired
responses from it. We demonstrate the principle explicitly by
implementing the fundamental NOR and NAND gates. We also demonstrate
that one can efficiently switch logic behaviour by simply varying
noise levels. Thus this scheme may help to construct dynamic general
purpose computational hardware, with reconfigurable abilities, using
the interplay between nonlinearity and noise.